1. Field of the Invention
The present invention relates to a semiconductor processing technique, and specifically to a semiconductor device, such as an FET (Field Effect Transistor) of the MIS (Metal Insulator Semiconductor) type, and a manufacturing method for the same. The term “semiconductor process” used herein includes various kinds of processes which are performed to manufacture a semiconductor device or a structure having wiring layers, electrodes, and the like to be connected to a semiconductor device, on a target substrate, such as a semiconductor wafer or a glass substrate used for an LCD (Liquid Crystal Display) or FPD (Flat Panel Display), by forming semiconductor layers, insulating layers, and conductive layers in predetermined patterns on the target substrate.
2. Description of the Related Art
Conventionally, in semiconductor devices of the MIS (Metal Insulator Semiconductor) type, representative of which is the MOS (Metal Oxide Semiconductor) type, poly-crystalline silicon (Poly-Si) has been used as the material of gate electrodes. In this case, n+-poly-crystalline silicon is used for the gate electrodes of n-type MISFETs to decrease the threshold voltage thereof. On the other hand, p+-poly-crystalline silicon is used for the gate electrodes of p-type MISFETs to decrease threshold voltage thereof.
Along with scaling down of semiconductor devices, the influence of depletion layers generated in gate electrodes cannot be ignored, so it is required to change the material of gate electrodes from Poly-Si to metal-based materials. However, where metal-based materials are applied to the gate electrodes of complementary transistors of the MIS type, electrodes cannot be differentiated for the n-type and p-type by ion implantation, unlike the case of Poly-Si being used. Accordingly, the gate electrodes of an n-type MISFET and a p-type MISFET need to be formed from metal-based materials having work functions optimum for the respective gate electrodes.
Where the gate electrodes of an n-type MISFET and a p-type MISFET are formed differently from each other, it is necessary to perform etching processes while minimizing the damage to the gate insulating film caused by the processes. If gate insulating films are respectively formed for the two regions, the number of steps and masks are undesirably increased. Further, where a common metal-based material is used for the gate electrodes of an n-type MISFET and a p-type MISFET, a technique for reliably controlling the work functions of the gate electrodes is required.
Jpn. Pat. Appln. KOKAI Publication No. 2005-79512(Patent Document 1) discloses a technique to control the work function of a gate electrode. According to this technique, the gate electrode is made of Mo and is then doped with nitrogen. Thereafter, a heating process is performed thereon to diffuse nitrogen outward by vapor-phase diffusion, thereby controlling the work function of the gate electrode. Where this technique is applied to a complementary transistor of the MIS type, a process is performed as follows. Specifically, a common Mo film is formed for the gate electrodes of an n-type MISFET and a p-type MISFET, and is then doped with nitrogen as a whole. Then, nitrogen is diffused outward only from a portion of the Mo film corresponding to one of the electrodes to adjust the nitrogen dosage, thereby controlling the work functions of the electrodes. However, in this case, nitrogen dosage control depends on vapor-phase diffusion of nitrogen, which cannot necessarily control the work function with high accuracy.